I decided to rename C52EVB to be 8051SBC. Since the cpu can be any 8051 compatible chips with 40-pin DIP package. The old day chips, say 8031, 8751, 8032 or the new chips, 89C51, 89C52, 89C51RD2 can be used without any problem. Some may think that your old chips were useless, now you can use it for many projects. The monitor program of new 8051SBC was placed at external 32kB EPROM. With this space, you can customize your own monitor code or even add the application program and have the DIP switch to boot it when power up. The 32kB SRAM still be mapped as external code and data memory. We can test the program in RAM, when it firms then put it in the space in EPROM. The memory and i/o decoder is now using GAL (Generic Array Logic).
The hardware schematic was provided to be an exemplary design for student to learn basic design of 8-bit microprocessor board. The board is a generic tool for every microprocessor lab. I provided all materials in public domain, so you may build it for your lab. Student can learn assembly programming, HLL programming and hardware interfacing.
The new 8051SBC features
CPU: Any 8051 compatible with 40-pin DIP package @11.0592MHz
MEMORY: 27C256, 32kB EPROM for monitor program
62256, 32KB SRAM for both code and data space
I/O: direct cpu bus interface 2x16 line LCD
8-bit input port, 74LS244
8-bit output port, 74HC573
MEMORY and I/O Decoder: GAL16V8D
EEPROM: 24LC256, 32KB serial eeprom
RTC: Real-time clock, DS1307 with +3V Lithium backup
ADC: LTC1298, SPI interface 2-channel 12-bit Analog-to-Digital Converter
I/O pins: P1,P3 of 8051 cpu, 16-bit I/O port
Debug LED: single dot LED connected to P1.7
Keypad and DIPSW: 4-bit keypad and 4-bit DIP switch
RS232 Level Converter: MAX232
RS485: 75176 differential transceiver
Serial Interface: 9600 8n1
Monitor Program: Modified PAULMON2 including new commands
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